; UART
;UART-CH_A_ENABLE 1
;UART-CH_B_ENABLE 1
;UART-CH_C_ENABLE 1
;UART-CH_D_ENABLE 1
;UART-CH_E_ENABLE 1
;UART-CH_F_ENABLE 1

; DDR
DDR-RETRAINING 0
DDR-CH_E_INIT 1
DDR-CH_F_INIT 1

; BOOT
;BOOT-GPIO_LOOP 22 1
;BOOT-PASS_LED 12 1
;BOOT-FAIL_LED 13 1
;BOOT-UART_DEBUG CH_A

; LOAD
;LOAD-MCPU_FUNCTION_ID 0

; DDR
; DMC: Databahn Memory Controller Block
; PI : PHY Independent Block
; PHY: PHY Block
